M48T18-100MH1 SRAM TIMEKEEPER

The M48T08/18/08Y TIMEKEEPER^®RAM is an 8 K x 8 non-volatile static RAM and real-time clock which is pin and function compatible with the DS1643. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory and real-time clock solution.

The M48T08/18/08Y is a non-volatile pin and function equivalent to any JEDEC standard 8 K x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed.

The 28-pin, 600 mil DIP CAPHAT™ houses the M48T08/18/08Y silicon with a quartz crystal and a long-life lithium button cell in a single package.

The 28-pin, 330 mil SOIC provides sockets with gold-plated contacts at both ends for direct connection to a separate SNAPHAT^® housing containing the battery and crystal. The unique design allows the SNAPHAT^®battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Insertion of the SNAPHAT^®housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surface-mounting. The SNAPHAT^®housing is keyed to prevent reverse insertion.

The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or in tape & reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT^®) part number is “M4T28-BR12SH” or “M4T32-BR12SH”.

Key Features

• Integrated ultra low power SRAM, real-time clock, power-fail control circuit, and battery
• BYTEWIDE^™ RAM-like clock access
• BCD coded year, month, day, date, hours, minutes, and seconds
• Typical clock accuracy of ±1 minute a month, at 25 °C
• Automatic power-fail chip deselect and WRITE protection
• WRITE protect V_PFD = power-fail deselect voltage):
  • M48T08: V_CC = 4.75 to 5.5 V; 4.5 V ≤ V_PFD ≤ 4.75 V
  • M48T18/T08Y: V_CC = 4.5 to 5.5 V; 4.2 V ≤ V_PFD ≤ 4.5 V
• Software controlled clock calibration for high accuracy applications
• Self-contained battery and crystal in the CAPHAT^™ DIP package
• Packaging includes a 28-lead SOIC and SNAPHAT^® top (to be ordered separately)
• SOIC package provides direct connection for a snaphat top which contains the battery and crystal
• Pin and function compatible with DS1643 and JEDEC standard 8 K x 8 SRAMs
• RoHS compliant
  • Lead-free second level interconnect